View RFD16N03_148311.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

RFD16N03L, RFD16N03LSM
Data Sheet April 1999 File Number
4013.2
16A, 30V, 0.025 Ohm, Logic Level, N-Channel Power MOSFETs
These are N-Channel power MOSFETs manufactured using the MegaFET process. This process, which uses feature sizes approaching those of LSI circuits, gives optimum utilization of silicon, resulting in outstanding performance. They were designed for use in applications such as switching regulators, switching converters, motor drivers and relay drivers. This performance is accomplished through a special gate oxide design which provides full rated conductance at gate bias in the 3V to 5V range, thereby facilitating true on-off power control directly from logic level (5V) integrated circuits. Formerly developmental type TA49030.
Features
* 16A, 30V * rDS(ON) = 0.025 * Temperature Compensating PSPICETM Model * Can be Driven Directly from CMOS, NMOS, and TTL Circuits * Peak Current vs Pulse Width Curve * UIS Rating Curve * 175oC Operating Temperature * Related Literature - TB334 "Guidelines for Soldering Surface Mount Components to PC Boards"
Ordering InformationS
PART NUMBER RFD16N03L RFD16N03LSM PACKAGE TO-251AA TO-252AA BRAND 16N03L 16N03L
Symbol
DRAIN
NOTE: When ordering, use the entire part number. Add the suffix 9A, to obtain the TO-252AA variant in tape and reel, e.g. RFD16N03LSM9A.
GATE
SOURCE
Packaging
JEDEC TO-251AA
SOURCE DRAIN GATE GATE SOURCE
JEDEC TO-252AA
DRAIN (FLANGE)
DRAIN (FLANGE)
6-156
CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures. PSPICETM is a trademark of MicroSim Corporation. http://www.intersil.com or 407-727-9207 | Copyright (c) Intersil Corporation 1999
RFD16N03L, RFD16N03LSM
Absolute Maximum Ratings
TC = 25oC, Unless Otherwise Specified RFD16N03L, RFD16N03LSM 30 30 10 16 Refer to Peak Current Curve Figures 6, 16, 17 90 0.606 -55 to 175 300 260 UNITS V V V A
Drain to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDSS Drain to Gate Voltage (RGS = 20k) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS Continuous Drain Current (Figure 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .ID Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM Pulsed Avalanche Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EAS Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD Derate Above 25oC (Figure 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG Maximum Temperature for Soldering Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . TL Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Tpkg
W W/oC oC
oC oC
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
LC1. TJ = 25oC to 150oC.
Electrical Specifications
PARAMETER
TC = 25oC, Unless Otherwise Specified SYMBOL BVDSS VGS(TH) IDSS IGSS rDS(ON) tON td(ON) tr td(OFF) tf tOFF Qg(TOT) Qg(5) Qg(TH) CISS COSS CRSS RJC RJA Figure 3 TO-251 and TO-252 VGS = 0V to 10V VGS = 0V to 5V VGS = 0V to 1V VDD = 24V, ID = 16A, RL = 1.5 IG(REF) = 0.6mA (Figures 15, 20, 21 TEST CONDITIONS ID = 250A, VGS = 0V (Figure 13) VGS = VDS, ID = 250A (Figure 12) VDS = 30V, VGS = 0V VGS = 10V ID = 16A, VGS = 5V (Figure 11) VDD = 15V, ID 16A, RL = 0.93, VGS = 5V, RGS = 5 (Figures 18, 19) TC = 25oC TC = 150oC MIN 30 1 TYP 15 95 25 27 50 30 1.5 1650 575 200 MAX 2 1 50 100 0.025 120 80 60 36 1.8 1.65 100 UNITS V V A A nA ns ns ns ns ns ns nC nC nC pF pF pF
oC/W oC/W
Drain to Source Breakdown Voltage Gate Threshold Voltage Zero Gate Voltage Drain Current
Gate to Source Leakage Current Drain to Source On Resistance Turn-On Time Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Turn-Off Time Total Gate Charge Gate Charge at 5V Threshold Gate Charge Input Capacitance Output Capacitance Reverse Transfer Capacitance Thermal Resistance, Junction to Case Thermal Resistance, Junction to Ambient
VDS = 25V, VGS = 0V, f = 1MHz (Figure 14)
Source to Drain Diode Specifications
PARAMETER Source to Drain Diode Voltage Diode Reverse Recovery Time NOTES: 2. Pulse Test: Pulse Width 300ms, Duty Cycle 2%. 3. Repetitive Rating: Pulse Width limited by max junction temperature. See Transient Thermal Impedance curve (Figure 3). SYMBOL VSD trr ISD = 16A ISD = 16A, dISD/dt = 100A/s TEST CONDITIONS MIN TYP MAX 1.5 75 UNITS V ns
6-157
RFD16N03L, RFD16N03LSM Typical Performance Curves Unless Otherwise Specified
1.2 POWER DISSIPATION MULTIPLIER 20
1.0 ID, DRAIN CURRENT (A) 0 25 50 75 100 125 TC , CASE TEMPERATURE (oC) 150 175 15 0.8 0.6 0.4 0.2 0 0 25 50 75 100 125 TC, CASE TEMPERATURE (oC) 150 175
10
5
FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE TEMPERATURE
FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs CASE TEMPERATURE
2 1 ZJC, NORMALIZED THERMAL IMPEDANCE 0.5 0.2 0.1 0.1 0.05 0.02 0.01 SINGLE PULSE 0.01 10-5 10-4 10-3 10-2 10-1 t1 , RECTANGULAR PULSE DURATION (s) t1 t2 NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZJC x RJC + TC 100 101 PDM
FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE
500
TJ = MAX RATED ID, DRAIN CURRENT (A) 100 100s
IDM, PEAK CURRENT CAPABILITY (A)
TC = 25oC
500 VGS = 10V VGS = 5V FOR TEMPERATURES ABOVE 25oC DERATE PEAK CURRENT AS FOLLOWS: I 100 TC = 25oC TRANSCONDUCTANCE MAY LIMIT CURRENT IN THIS REGION
= I25
175 - TC 150
1ms 10 10ms OPERATION IN THIS AREA MAY BE LIMITED BY rDS(ON) 1 1 10 VDS, DRAIN TO SOURCE VOLTAGE (V) 50 100ms DC
VDSS MAX = 30V
10 10-5
10-4
10-3 10-2 10-1 t, PULSE WIDTH (s)
100
101
FIGURE 4. FORWARD BIAS SAFE OPERATING AREA
FIGURE 5. PEAK CURRENT CAPABILITY
6-158
RFD16N03L, RFD16N03LSM Typical Performance Curves Unless Otherwise Specified (Continued)
200 IAS, AVALANCHE CURRENT (A) 100 ID, DRAIN CURRENT (A) STARTING TJ = 25oC 75 VGS = 4.5V VGS = 4V 100 VGS = 10V VGS = 5V
10
STARTING TJ = 150oC
50
VGS = 3.5V 25 PULSE DURATION = 250s, TC = 25oC 0 VGS = 3V
If R = 0 tAV = (L)(IAS)/(1.3*RATED BVDSS - VDD) If R 0 tAV=(L/R)ln[(IAS*R)/(1.3*RATED BVDSS-VDD) +1] 1 0.001 0.01 0.1 1 tAV, TIME IN AVALANCHE (ms) 10 100
0
2.0 3.0 4.0 1.0 VDS, DRAIN TO SOURCE VOLTAGE (V)
5.0
NOTE: Refer to Intersil Application Notes AN9321 and AN9322. FIGURE 6. UNCLAMPED INDUCTIVE SWITCHING FIGURE 7. SATURATION CHARACTERISTICS
IDS(ON), DRAIN TO SOURCE CURRENT (A)
100
rDS(ON), DRAIN TO SOURCE
PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX VDD = 15V -55oC
175oC
100 ID = 32A ON RESISTANCE (m) 75 ID = 16A ID = 8A 50 ID = 2A
75 25oC 50
25
25
TJ = 25oC PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX
0 0 1.5 3.0 4.5 6.0 VGS, GATE TO SOURCE VOLTAGE (V) 7.5
0 2.5
3.0
3.5
4.0
4.5
5.0
VGS, GATE TO SOURCE VOLTAGE (V)
FIGURE 8. TRANSFER CHARACTERISTICS
FIGURE 9. DRAIN TO SOURCE ON RESISTANCE vs GATE VOLTAGE AND DRAIN CURRENT
250 VDD = 15V, IDD = 16A, RL = 0.93 200 SWITCHING TIME (ns)
tr NORMALIZED DRAIN TO SOURCE ON RESISTANCE
2.0
VGS = 5V, ID = 16A PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX.
tf 150 td(ON) 100 td(OFF) 50
1.5
1.0
0.5
0 0 10 20 30 40 RGS, GATE TO SOURCE RESISTANCE () 50
0 -80 -40 0 40 80 120 160 200 TJ, JUNCTION TEMPERATURE (oC)
FIGURE 10. SWITCHING TIME vs GATE RESISTANCE
FIGURE 11. NORMALIZED DRAIN TO SOURCE ON RESISTANCE vs JUNCTION TEMPERATURE
6-159
RFD16N03L, RFD16N03LSM Typical Performance Curves Unless Otherwise Specified (Continued)
2.0 VGS = VDS, ID = 250A NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE 2.0
ID = 250A
THRESHOLD VOLTAGE
NORMALIZED GATE
1.5
1.5
1.0
1.0
0.5
0.5
0 -80
-40
0 40 80 120 160 TJ, JUNCTION TEMPERATURE (oC)
200
0 -80
-40
0
40
80
120
160
200
TJ , JUNCTION TEMPERATURE (oC)
FIGURE 12. NORMALIZED GATE THRESHOLD VOLTAGE vs JUNCTION TEMPERATURE
FIGURE 13. NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE vs JUNCTION TEMPERATURE
30 5 VDD = BVDSS 24 VDD = BVDSS 4 VGS , GATE TO SOURCE VOLTAGE (V)
2500 VGS = 0V, f = 1MHz 2000 C, CAPACITANCE (pF)
CISS CISS = CGS + CGD CRSS = CGD COSS CDS + CGD COSS
VDS , DRAIN TO SOURCE VOLTAGE (V)
18 0.75 BVDSS 0.50 BVDSS 0.25 BVDSS RL = 1.875 IG(REF) = 0.6mA VGS = 5V IG(REF) IG(ACT) IG(REF) IG(ACT)
3
1500
12
2
1000
6
1
500 CRSS 0 0 5 10 15 20 VDS, DRAIN TO SOURCE VOLTAGE (V)
0 25 20
0
t, TIME (s)
80
NOTE: Refer to Intersil Application Notes AN7254 and AN7260. FIGURE 15. NORMALIZED SWITCHING WAVEFORMS FOR CONSTANT GATE CURRENT
FIGURE 14. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
Test Circuits and Waveforms
VDS BVDSS L VARY tP TO OBTAIN REQUIRED PEAK IAS VGS DUT tP RG IAS VDD tP VDS VDD
+
0V
IAS 0.01
0 tAV
FIGURE 16. UNCLAMPED ENERGY TEST CIRCUIT
FIGURE 17. UNCLAMPED ENERGY WAVEFORMS
6-160
RFD16N03L, RFD16N03LSM Test Circuits and Waveforms
(Continued)
tON VDS VDS VGS RL
+
tOFF td(OFF) tr tf 90%
td(ON)
90%
10% VDD 90% VGS 10% 50% PULSE WIDTH 50%
10%
DUT RGS VGS
-
FIGURE 18. RESISTIVE SWITCHING TEST CIRCUIT
FIGURE 19. RESISTIVE SWITCHING WAVEFORMS
VDS RL VDD VDS VGS = 10V VGS
+
Qg(TOT)
Qg(5) VDD VGS VGS = 1V 0 Qg(TH) IG(REF) 0 VGS = 5V
DUT IG(REF)
FIGURE 20. GATE CHARGE TEST CIRCUIT
FIGURE 21. GATE CHARGE WAVEFORMS
6-161
RFD16N03L, RFD16N03LSM PSPICE Electrical Model
.SUBCKT RFD16N03L 2 1 3; rev 12/12/94
CA 12 8 2.55e-9 CB 15 14 2.64e-9 CIN 6 8 1.45e-9 DBODY 7 5 DBDMOD DBREAK 5 11 DBKMOD DPLCAP 10 5 DPLCAPMOD EBREAK 11 7 17 18 33.3 EDS 14 8 5 8 EGS 13 8 6 8 ESG 6 10 6 8 EVTO 20 6 18 IT 8 17 1 LDRAIN 2 5 1e-9 LGATE 1 9 3.4e-9 LSOURCE 3 7 3.4e-9
1 18 20 8 + GATE LGATE RGATE 9 EVTO 10 DPLCAP RSCL2 5 51 RSCL1 ESCL DBREAK 5
LDRAIN 2 DRAIN
1 1 1 81
ESG +
6 8 VTO
RDRAIN 16
11 EBREAK MOS2 17 18
+
6 RIN
-
+
DBODY
-
21 MOS1
CIN 8 RSOURCE 7 LSOURCE 3 SOURCE
MOS1 16 6 8 8 MOSMOD M = 0.99 MOS2 16 21 8 8 MOSMOD M = 0.01 RBREAK 17 18 RBKMOD 1 RDRAIN 50 16 RDSMOD 0.14e-3 RGATE 9 20 0.89 RIN 6 8 1e9 RSCL1 5 51 RSCLMOD 1e-6 RSCL2 5 50 1e3 RSOURCE 8 7 RDSMOD 10.31e-3 RVTO 18 19 RVTOMOD 1 S1A S1B S2A S2B 6 12 13 8 S1AMOD 13 12 13 8 S1BMOD 6 15 14 13 S2AMOD 13 15 14 13 S2BMOD
S1A 12 13 8 S1B CA + 6 EGS 8 13
S2A 14 13 S2B CB IT + EDS 14 5 8 19 VBAT + 15 17 RBREAK 18
RVTO
-
-
-
VBAT 8 19 DC 1 VTO 21 6 0.583 ESCL 51 50 VALUE = {(V(5,51)/ABS(V(5,51)))*(PWR(V(5,51)*1e6/176,6))} .MODEL DBDMOD D (IS = 3.61e-13 RS = 5.06e-3 TRS1 = 3.05e-3 TRS2 = 7.57e-6 CJO = 2.16e-9 TT = 2.18e-8) .MODEL DBKMOD D (RS = 1.66e-1 TRS1 = -2.97e-3 TRS2 = 7.57e-6) .MODEL DPLCAPMOD D (CJO = 0.96e-9 IS = 1e-30 N = 10) .MODEL MOSMOD NMOS (VTO = 2.313 KP = 53.82 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u) .MODEL RBKMOD RES (TC1 = 8.95e-4 TC2 = -1e-7) .MODEL RDSMOD RES (TC1 = 3.92e-3 TC2 = 1.29e-5) .MODEL RSCLMOD RES (TC1 = 2.03e-3 TC2 = 0.45e-5) .MODEL RVTOMOD RES (TC1 = -2.27e-3 TC2 = -5.75e-7) .MODEL S1AMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -4.82 VOFF= -2.82) .MODEL S1BMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -2.82 VOFF= -4.82) .MODEL S2AMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -2.67 VOFF= 2.33) .MODEL S2BMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = 2.33 VOFF= -2.67) .ENDS
NOTE: For further discussion of the PSPICE model, consult A New PSPICE Sub-Circuit for the Power MOSFET Featuring Global Temperature Options; written by William J. Hepp and C. Frank Wheatley.
6-162
RFD16N03L, RFD16N03LSM
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
Sales Office Headquarters
NORTH AMERICA Intersil Corporation P. O. Box 883, Mail Stop 53-204 Melbourne, FL 32902 TEL: (407) 724-7000 FAX: (407) 724-7240 EUROPE Intersil SA Mercure Center 100, Rue de la Fusee 1130 Brussels, Belgium TEL: (32) 2.724.2111 FAX: (32) 2.724.22.05 ASIA Intersil (Taiwan) Ltd. 7F-6, No. 101 Fu Hsing North Road Taipei, Taiwan Republic of China TEL: (886) 2 2716 9310 FAX: (886) 2 2715 3029
6-163

▲Up To Search▲

Price & Availability of RFD16N03

	To Download RFD16N03 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .